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? 2005 fairchild semiconductor corporation ds012006 www.fairchildsemi.com february 1994 revised march 2005 74lcx245 low voltage bidirectional transceiver with 5v tolerant inputs and outputs 74lcx245 low voltage bidirectional transceiver with 5v tolerant inputs and outputs general description the lcx245 contains eight non-inverting bidirectional buff- ers with 3-state outputs and is intended for bus oriented applications. the device is designed for low voltage (2.5v and 3.3v) v cc applications with capability of interfacing to a 5v signal environment. the t/r input determines the direction of data flow through the device. the oe input dis- ables both the a and b ports by placing them in a high impedance state. the lcx245 is fabricated with an advanced cmos tech- nology to achieve high speed operation while maintaining cmos low power dissipation. features 5v tolerant inputs and outputs 2.3v to 3.6v v cc specifications provided 7.0 ns t pd max (v cc 3.3v), 10 p a i cc max power down high impedance inputs and outputs supports live insertion/withdrawal (note 1) r 24 ma output drive (v cc 3.0v) implements patented noise/emi reduction circuitry latch-up performance exceeds 500 ma esd performance: human body model ! 2000v machine model ! 200v leadless dqfn pb-free package note 1: to ensure the high-impedance state during power up or down, oe should be tied to v cc through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. ordering code: pb-free package per jedec j-std-020b. note 2: devices also available in tape and reel. specify by appending the suffix letter ?x? to the ordering code. note 3: dqfn package available in tape and reel only. note 4: ?_nl? indicates pb-free package (per jedec j-std-020b). device available in tape and reel only. order number package number package description 74lcx245wm (note 2) m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide 74lcx245wmx_nl (note 4) m20b pb-free 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide 74lcx245sj (note 2) m20d pb-free 20-lead small outline package (sop), eiaj type ii, 5.3mm wide 74lcx245bqx (note 3) mlp020b pb-free 20-terminal depopulated quad very-thin flat pack no leads (dqfn), jedec mo-241, 2.5 x 4.5mm 74lcx245msa (note 2) msa20 20-lead shrink small outline package (ssop), jedec mo-150, 5.3mm wide 74lcx245mtc (note 2) mtc20 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide 74lcx245mtcx_nl (note 4) mtc20 pb-free 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide
www.fairchildsemi.com 2 74lcx245 logic symbol pin descriptions truth table h high voltage level l low voltage level x immaterial z high impedance note 5: unused bus terminals during high z state must be held high or low. connection diagrams pin assignments for soic, sop, ssop, and tssop pin assignment for dqfn (top through view) logic diagram pin names description oe output enable input t/r transmit/receive input a 0 ? a 7 side a inputs or 3-state outputs b 0 ? b 7 side b inputs or 3-state outputs inputs outputs oe t/r l l bus b 0 ? b 7 data to bus a 0 ? a 7 l h bus a 0 ? a 7 data to bus b 0 ? b 7 h x high z state on a 0 ? a 7 , b 0 ? b 7 (note 5)
3 www.fairchildsemi.com 74lcx245 absolute maximum ratings (note 6) recommended operating conditions (note 8) note 6: the absolute maximum ratings are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maxi mum ratings. the ? recom- mended operating conditions ? table will define the conditions for actual device operation. note 7: i o absolute maximum rating must be observed. note 8: unused inputs or i/o pins must be held high or low. they may not float. dc electrical characteristics symbol parameter value conditions units v cc supply voltage 0.5 to 7.0 v v i dc input voltage 0.5 to 7.0 v v o dc output voltage 0.5 to 7.0 output in 3-state v 0.5 to v cc 0.5 output in high or low state (note 7) i ik dc input diode current 50 v i gnd ma i ok dc output diode current 50 v o gnd ma 50 v o ! v cc i o dc output source/sink current r 50 ma i cc dc supply current per supply pin r 100 ma i gnd dc ground current per ground pin r 100 ma t stg storage temperature 65 to 150 q c symbol parameter min max units v cc supply voltage operating 2.0 3.6 v data retention 1.5 3.6 v i input voltage 05.5v v o output voltage high or low state 0 v cc v 3-state 0 5.5 i oh /i ol output current v cc 3.0v to 3.6v r 24 ma v cc 2.7v to 3.0v r 12 v cc 2.3v to 2.7v r 8 t a free-air operating temperature 40 85 q c ' t/ ' v input edge rate, v in 0.8v to 2.0v, v cc 3.0v 0 10 ns/v symbol parameter conditions v cc t a 40 q c to 85 q c units (v) min max v ih high level input voltage 2.3 to 2.7 1.7 v 2.7 to 3.6 2.0 v il low level input voltage 2.3 to 2.7 0.7 v 2.7 to 3.6 0.8 v oh high level output voltage i oh 100 p a 2.3 to 3.6 v cc 0.2 v i oh 8 ma 2.3 1.8 i oh 12 ma 2.7 2.2 i oh 18 ma 3.0 2.4 i oh 24 ma 3.0 2.2 v ol low level output voltage i ol 100 p a 2.3 to 3.6 0.2 v i ol 8ma 2.3 0.6 i ol 12 ma 2.7 0.4 i ol 16 ma 3.0 0.4 i ol 24 ma 3.0 0.55 i i input leakage current 0 d v i d 5.5v 2.3 to 3.6 r 5.0 p a i oz 3-state i/o leakage 0 d v o d 5.5v 2.3 to 3.6 r 5.0 p a v i v ih or v il i off power-off leakage current v i or v o 5.5v 0 10 p a
www.fairchildsemi.com 4 74lcx245 dc electrical characteristics (continued) note 9: outputs disabled or 3-state only. ac electrical characteristics note 10: skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of th e same device. the specification applies to any outputs switching in the same direction, either high-to-low (t oshl ) or low-to-high (t oslh ). dynamic switching characteristics capacitance symbol parameter conditions v cc t a 40 q c to 85 q c units (v) min max i cc quiescent supply current v i v cc or gnd 2.3 to 3.6 10 p a 3.6v d v i , v o d 5.5v (note 9) 2.3 to 3.6 r 10 ' i cc increase in i cc per input v ih v cc 0.6v 2.3 to 3.6 500 p a symbol parameter t a 40 q c to 85 q c, r l 500 : units v cc 3.3v r 0.3v v cc 2.7v v cc 2.5v r 0.2v c l 50 pf c l 50 pf c l 30 pf min max min max min max t phl propagation delay 1.5 7.0 1.5 8.0 1.5 8.4 ns t plh a n to b n or b n to a n 1.5 7.0 1.5 8.0 1.5 8.4 t pzl output enable time 1.5 8.5 1.5 9.5 1.5 10.5 ns t pzh 1.5 8.5 1.5 9.5 1.5 10.5 t plz output disable time 1.5 7.5 1.5 8.5 1.5 9.0 ns t phz 1.5 7.5 1.5 8.5 1.5 9.0 t oshl output to output skew 1.0 ns t oslh (note 10) 1.0 symbol parameter conditions v cc t a 25 q c units (v) typical v olp quiet output dynamic peak v ol c l 50 pf, v ih 3.3v, v il 0v 3.3 0.8 v c l 30 pf, v ih 2.5v, v il 0v 2.5 0.6 v olv quiet output dynamic valley v ol c l 50 pf, v ih 3.3v, v il 0v 3.3 0.8 v c l 30 pf, v ih 2.5v, v il 0v 2.5 0.6 symbol parameter conditions typical units c in input capacitance v cc open, v i 0v or v cc 7.0 pf c i/o input/output capacitance v cc 3.3v, v i 0v or v cc 8.0 pf c pd power dissipation capacitance v cc 3.3v, v i 0v or v cc , f 10 mhz 25.0 pf
5 www.fairchildsemi.com 74lcx245 ac loading and waveforms generic for lcx family figure 1. ac test circuit (c l includes probe and jig capacitance) waveform for inverting and non-inverting functions propagation delay. pulse width and t rec waveforms 3-state output low enable and disable times for logic 3-state output high enable and disable times for logic setup time, hold time and recovery time for logic t rise and t fall figure 2. waveforms (input characteristics; f =1mhz, t r = t f = 3ns) test switch t plh , t phl open t pzl , t plz 6v at v cc 3.3v r 0.3v v cc x 2 at v cc 2.5v r 0.2v t pzh , t phz gnd symbol v cc 3.3v r 0.3v 2.7v 2.5v r 0.2v v mi 1.5v 1.5v v cc /2 v mo 1.5v 1.5v v cc /2 v x v ol 0.3v v ol 0.3v v ol 0.15v v y v oh 0.3v v oh 0.3v v oh 0.15v
www.fairchildsemi.com 6 74lcx245 schematic diagram generic for lcx family
7 www.fairchildsemi.com 74lcx245 tape and reel specification tape format for dqfn tape dimensions inches (millimeters) reel dimensions inches (millimeters) package tape number cavity cover tape designator section cavities status status leader (start end) 125 (typ) empty sealed bqx carrier 3000 filled sealed trailer (hub end) 75 (typ) empty sealed tape sizeabcdnw1w2 12 mm 13.0 0.059 0.512 0.795 2.165 0.488 0.724 (330.0) (1.50) (13.00) (20.20) (55.00) (12.4) (18.4)
www.fairchildsemi.com 8 74lcx245 physical dimensions inches (millimeters) unless otherwise noted 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide package number m20b
9 www.fairchildsemi.com 74lcx245 physical dimensions inches (millimeters) unless otherwise noted (continued) pb-free 20-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m20d
www.fairchildsemi.com 10 74lcx245 physical dimensions inches (millimeters) unless otherwise noted (continued) pb-free 20-terminal depopulated quad very-thin flat pack no leads (dqfn), jedec mo-241, 2.5 x 4.5mm package number mlp020b
11 www.fairchildsemi.com 74lcx245 physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead shrink small outline package (ssop), jedec mo-150, 5.3mm wide package number msa20
www.fairchildsemi.com 12 74lcx245 low voltage bidirectional transceiver with 5v tolerant inputs and outputs physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide package number mtc20 fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
careers | sitema go datasheets, samples, buy technical information applications design center support company investors my f a home >> find products >> 74lcx245 low voltage bidirectional transceiver with 5v tolerant inputs and outputs general description back to top features contents ? general description ? features ? product status/pricing/packaging ? order samples ? models ? application notes ? qualification support the lcx245 contains eight non-inverting bidirectional buffers with 3- state outputs and is intended for bus oriented applications. the device is designed for low voltage (2.5v and 3.3v) v cc applications with capability of interfacing to a 5v signal environment. the t/r# input determines the direction of data flow through the device. the oe# input disables both the a and b ports by placing them in a high impedance state. the lcx245 is fabricated with an advanced cmos technology to achieve high speed operation while maintaining cmos low power dissipation. z 5v tolerant inputs and outputs z 2.3v to 3.6v v cc specifications provided z 7.0 ns t pd max (v cc = 3.3v), 10 a i cc max z power down high impedance inputs and outputs z supports live insertion/withdrawal (note 1) z 24 ma output drive (v cc = 3.0v) z implements patented noise/emi reduction circuitry z latch-up performance exceeds 500 ma z esd performance: human body model > 2000v datasheet download this datasheet e - mail this datasheet this page print version related links request samples how to order products product change notices (pcns) support sales support quality and reliability design cente r pa g e 1 of 5 product folder - fairchil d p/n 74lcx245 - low volta g e bidirectional transceive r with 5v tolerant in p uts and out p uts 16-au g -2007 mhtml:file://c:\ temp\74lcx245sjx _ nl.mht
product status/pricing/packaging back to top machine model > 200v z leadless dqfn pb-free package product product status pb-free status pricing* package type leads packing method package marking convention** 74lcx245bqx full production $0.398 dqfn 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245msa full production $0.55 ssop 20 rail line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245msax full production $0.451 ssop 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245msax_nl full production n/a ssop 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245mtc full production $0.194 tssop 20 rail line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245mtcx full production $0.194 tssop 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245mtcx_nl full production n/a tssop 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 pa g e 2 of 5 product folder - fairchil d p/n 74lcx245 - low volta g e bidirectional transceiver with 5v tolerant in p uts and out p uts 16-au g -2007 mhtml:file://c:\ temp\74lcx245sjx _ nl.mht
back to top models 74lcx245sj full production $0.265 sop 20 rail line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245sjx full production $0.265 sop 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245sjx_nl full production n/a sop 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245wm full production $0.233 soic-wide 20 rail line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245wmx full production $0.233 soic-wide 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 74lcx245wmx_nl full production n/a soic-wide 20 tape reel line 1: $y (fairchild logo) & z (asm. plant code) & 2 (2-digit date code) & t (die trace code) line 2: lcx245 * fairchild 1,000 piece budgetary pricing ** a sample button will appear if the part is available through fa irchild's on-line samples program. if there is no sample butt on, please contact a fairchild distributor to obtain samples indicates product with pb -free second-level interconne ct. for more information click here. package marking information for product 74lcx245 is available. click here for more information . package & leads condition temperature range vcc range software version revision date hspice pa g e 3 of 5 product folder - fairchil d p/n 74lcx245 - low volta g e bidirectional transceiver with 5v tolerant in p uts and out p uts 16-au g -2007 mhtml:file://c:\ temp\74lcx245sjx _ nl.mht
back to top application notes back to top qualification support click on a product for detailed qualification data dqfn-20 slow -40c to 85c 2.3v to 3.6v 2001.4 oct 6, 2003 fast -40c to 85c 2.3v to 3.6v 2001.4 oct 6, 2003 typical -40c to 85c 2.3v to 3.6v 2001.4 oct 6, 2003 soic-wide-20 fast -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 typical -40c to 85c 2v to 3.6v 98.4 mar 10, 2003 slow -40c to 85c 2v to 3.6v 98.4 mar 10, 2003 sop-20 slow -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 fast -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 typical -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 ssop-20 slow -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 fast -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 typical -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 tssop-20 typical -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 fast -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 slow -40c to 85c 2v to 3.6v 2001.4 mar 10, 2003 ibis soic-wide-20 all -40c to 85c 3.15v to 3.45v 3.2 dec 10, 2000 tssop-20 all -40c to 85c 3v to 3.6v 2.1 jan 27, 1998 a n - 5054: low noise leadless packages ad vance portable designs (51 k) jul 27, 2007 ms - 520: logic design considerations (216 k) jul 27, 2007 product 74lcx245bqx 74lcx245msa pa g e 4 of 5 product folder - fairchil d p/n 74lcx245 - low volta g e bidirectional transceiver with 5v tolerant in p uts and out p uts 16-au g -2007 mhtml:file://c:\ temp\74lcx245sjx _ nl.mht
back to top 74lcx245msax 74lcx245msax_nl 74lcx245mtc 74lcx245mtcx 74lcx245mtcx_nl 74lcx245sj 74lcx245sjx 74lcx245sjx_nl 74lcx245wm 74lcx245wmx 74lcx245wmx_nl ? 2007 fairchild semiconductor products | design center | support | company news | investors | my fairchild | contact us | site index | privacy policy | site terms & conditions | standard terms & conditions o pa g e 5 of 5 product folder - fairchil d p/n 74lcx245 - low volta g e bidirectional transceiver with 5v tolerant in p uts and out p uts 16-au g -2007 mhtml:file://c:\ temp\74lcx245sjx _ nl.mht

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